User Contributed MET/CAL PROCEDURE ============================================================================= INSTRUMENT: Wavetek 166 Sub Procedure 2 DATE: 15-Aug-97 AUTHOR: User Contributed REVISION: 0 ADJUSTMENT THRESHOLD: 70% NUMBER OF TESTS: 17 NUMBER OF LINES: 239 CONFIGURATION: HP 34401A STANDARD: HP 8903A STANDARD: Fluke A55 ============================================================================= STEP FSC RANGE NOMINAL TOLERANCE MOD1 MOD2 3 4 CON 1.001 ASK- P F 1.002 ASK+ X 1.003 HEAD {} 1.004 HEAD {* SINE DISTORTION TEST *} 1.005 JMP 2.001 1.006 EVAL 2.001 DISP Set the UUT front panel controls as follows: 2.001 DISP FREQUENCY dial ....................................... 5 2.001 DISP FREQUENCY (Hz) switch ............................. X 10 2.001 DISP OUTPUT VERNIER ............................... fully CCW 2.002 STD HP 8903A 2.003 DISP Connect the UUT 50 ohm FUNC OUT to the 8903A 2.003 DISP INPUT HI BNC. 2.004 IEEE [@8903][TERM LF] 2.005 IEEE [@8903]L1 2.006 IEEE [@8903]M3 2.007 IEEE [@8903]LN 2.008 IEEE [@8903][I] 2.009 ACC 0.00pct 0.01U 2.010 MEME 2.011 MEMC pct 0.5U 50H #! Test Tol 0.5, Sys Tol 0.03, TUR 16.667 (>= 4.00). 3.001 DISP Set the UUT front panel controls as follows: 3.001 DISP FREQUENCY dial ....................................... 1 3.001 DISP FREQUENCY (Hz) switch ............................. X 1K 3.002 IEEE [@8903][I] 3.003 ACC 0.00pct 0.01U 3.004 MEME 3.005 MEMC pct 0.5U 1kH #! Test Tol 0.5, Sys Tol 0.03, TUR 16.667 (>= 4.00). 4.001 DISP Set the UUT front panel controls as follows: 4.001 DISP FREQUENCY dial ....................................... 5 4.001 DISP FREQUENCY (Hz) switch ............................ X 10K 4.002 IEEE [@8903][I] 4.003 ACC 0.00pct 0.01U 4.004 MEME 4.005 MEMC pct 0.5U 50kH #! Test Tol 0.5, Sys Tol 0.03, TUR 16.667 (>= 4.00). 5.001 DISP Disconnect the test setup. 5.002 HEAD {} 5.003 HEAD {* AMPLITUDE STABILITY TEST *} 5.004 JMP 6.001 5.005 EVAL 6.001 DISP Set the UUT front panel controls as follows: 6.001 DISP FREQUENCY dial ....................................... 1 6.001 DISP FREQUENCY (Hz) switch ............................. X 1K 6.002 DISP Connect the UUT 50 ohm FUNC OUT to the 33401A HI and LO 6.002 DISP inputs through a 50 ohm feedtrough connector. 6.003 IEEE [@34401]FUNC "VOLT:AC"[GTL] 6.004 DISP Adjust the UUT OUTPUT VERNIER for a 33401A reading 6.004 DISP of approximately 1.77 VRMS (5 Vp-p). 6.005 ACC 1.77V 0.002% 6.006 IEEE [@34401]READ?[I] 6.007 MEME 6.008 HEAD Test takes 10 minutes... Please Wait 6.009 IEEE [D30000][D30000][D30000][D30000][D30000][D30000][D30000] 6.009 IEEE [D30000][D30000][D30000][D30000][D30000][D30000][D30000] 6.009 IEEE [D30000][D30000][D30000][D30000][D30000][D30000] 6.010 IEEE [@34401]READ?[D2000][I] 6.011 MEME 6.012 HEAD AMPLITUDE STABILITY TEST 6.013 MEMC VRMS 0.0500% 10_minutes #! T.U.R. not calculated because System Uncertainty not available. 7.001 DISP Disconnect the test setup. 7.002 HEAD {} 7.003 HEAD {* ATTENUATOR TEST *} 7.004 JMP 8.003 7.005 EVAL 8.001 DISP Set the UUT front panel controls as follows: 8.001 DISP OUTPUT ATTEN ......................................... 0 8.002 DISP Connect the UUT 50 ohm FUNC OUT to the 33401A HI and LO 8.002 DISP inputs. 8.003 DISP Set the UUT front panel controls as follows: 8.003 DISP FREQUENCY (Hz) switch ........................... X 100K 8.004 IEEE [@34401]FUNC "VOLT:AC"[GTL] 8.005 DISP Adjust the UUT OUTPUT VERNIER for a 33401A reading 8.005 DISP of approximately 10.000 VRMS. 8.006 IEEE [@34401]READ?[T0][I] 8.007 RSLT =Referenced to [MEM] VRMS 8.008 MATH M[1] = MEM 8.009 DISP Set the UUT front panel controls as follows: 8.009 DISP OUTPUT ATTEN ........................................ 20 # 8.010 ACC 1 1.0000V 0.12% 0.06/ 8.010 MATH MEM1 = M[1] / 10 8.011 IEEE [@34401]READ?[T0][I] 8.012 MEME 8.013 TOL +3.5100% -3.4000% 8.014 MEMC V TOL 20D #! Test Tol 0.034, Sys Tol 0.00015, TUR 226.667 (>= 4.00). 9.001 DISP Set the UUT front panel controls as follows: 9.001 DISP OUTPUT ATTEN ........................................ 40 9.002 IEEE [@34401]FUNCE "VOLT:AC"[GTL] # 9.003 ACC 0.1 0.1000V 0.12% 0.06/ 9.003 MATH MEM1 = M[1] / 100 9.004 IEEE [@34401]READ?[T0][I] 9.005 MEME 9.006 TOL +7.2000% -6.7000% 9.007 MEMC V TOL 40D #! Test Tol 0.0067, Sys Tol 3.3e-005, TUR 203.030 (>= 4.00). 10.001 DISP Set the UUT front panel controls as follows: 10.001 DISP OUTPUT ATTEN ........................................ 60 10.002 IEEE [@34401]FUNC "VOLT:AC"[GTL] # 10.003 ACC 0.1 0.0100V 0.12% 0.06/ 10.003 MATH MEM1 = M[1] / 1000 10.004 IEEE [@34401]READ?[T0][I] 10.005 MEME 10.006 TOL +11.0000% -10.0000% 10.007 MEMC V TOL 60D #! Test Tol 0.001, Sys Tol 2.13e-005, TUR 46.948 (>= 4.00). 11.001 DISP Disconnect the test setup. 11.002 HEAD {} 11.003 HEAD {* FLATNESS TEST *} 11.004 DISP Set the UUT front panel controls as follows: 11.004 DISP OUTPUT ATTEN ......................................... 0 11.004 DISP OUTPUT VERNIER ............................... fully CCW 11.004 DISP FREQUENCY dial ....................................... 1 11.004 DISP FREQUENCY (Hz) switch ............................. X 1K 11.005 STD Fluke A55 11.006 DISP Connect the input of the Fluke A55 Thermal Converter 11.006 DISP to the UUT 50 ohm FUNC OUT connector. 11.007 DISP Connect the output of the A55 to the 33401A HI and LO 11.007 DISP input connectors. 11.008 IEEE [@33401]FUNC "VOLT:DC" 11.009 IEEE [@34401]VOLT:DC:RANGE:AUTO ON[GTL] 11.010 DISP Slowly increase the UUT output level using the OUTPUT 11.010 DISP VERNIER control, until the 33401A indicates 11.010 DISP approximately 3.5 mVDC. 11.011 DISP Allow sufficient time for the 33401A reading to 11.011 DISP stabilize before advancing. 11.012 IEEE [@34401]READ?[D2000][I] 11.013 MEM* 1000 11.014 RSLT =Referenced to [MEM] mVDC @ 1kHz output 11.015 HEAD {}FLATNESS TEST 11.016 MATH M[1] = MEM 11.017 DISP Set the UUT front panel controls as follows: 11.017 DISP FREQUENCY (Hz) switch ............................. X 10 11.018 DISP Allow sufficient time for the 33401A reading to 11.018 DISP stabilize before advancing. 11.019 IEEE [@33401]READ?[D2000][I] # 11.020 ACC 100 3.5000mV .005% .0035/ 11.020 MEM* 1000 11.021 MATH MEM1 = M[1] 11.022 MEME 11.023 MEMC mV 1.1600% 10H #! Test Tol 0.0406, Sys Tol 0.00037149, TUR 109.290 (>= 4.00). 12.001 DISP Set the UUT front panel controls as follows: 12.001 DISP FREQUENCY (Hz) switch ............................ X 100 12.002 IEEE [@33401]FUNC "VOLT:DC" 12.003 IEEE [@34401]VOLT:DC:RANGE:AUTO ON[GTL] 12.004 DISP Allow sufficient time for the 33401A reading to 12.004 DISP stabilize before advancing. 12.005 IEEE [@34401]READ?[D2000][I] #12.006 ACC 100 3.5000mV .005% .0035/ 12.006 MEM* 1000 12.007 MATH MEM1 = M[1] 12.008 MEME 12.009 MEMC mV 1.1600% 100H #! Test Tol 0.0406, Sys Tol 0.00037149, TUR 109.290 (>= 4.00). 13.001 DISP Set the UUT front panel controls as follows: 13.001 DISP FREQUENCY (Hz) switch ............................ X 10K 13.002 IEEE [@33401]FUNC "VOLT:DC" 13.003 IEEE [@34401]VOLT:DC:RANGE:AUTO ON[GTL] 13.004 DISP Allow sufficient time for the 33401A reading to 13.004 DISP stabilize before advancing. 13.005 IEEE [@34401]READ?[D2000][I] # 13.006 ACC 100 3.5000mV .005% .0035/ 13.006 MEM* 1000 13.007 MATH MEM1 = M[1] 13.008 MEME 13.009 MEMC mV 1.1600% 10KH #! Test Tol 0.0406, Sys Tol 0.00037149, TUR 109.290 (>= 4.00). 14.001 DISP Set the UUT front panel controls as follows: 14.001 DISP FREQUENCY (Hz) switch ........................... X 100K 14.002 IEEE [@33401]FUNC "VOLT:DC" 14.003 IEEE [@34401]VOLT:DC:RANGE:AUTO ON[GTL] 14.004 DISP Allow sufficient time for the 33401A reading to 14.004 DISP stabilize before advancing. 14.005 IEEE [@34401]READ?[D2000][I] # 14.006 ACC 100 3.5000mV .005% .0035/ 14.006 MEM* 1000 14.007 MATH MEM1 = M[1] 14.008 MEME 14.009 MEMC mV 2.3300% 100KH #! Test Tol 0.08155, Sys Tol 0.00037149, TUR 219.521 (>= 4.00). 15.001 DISP Set the UUT front panel controls as follows: 15.001 DISP FREQUENCY (Hz) switch ............................. X 1M 15.002 IEEE [@33401]FUNC "VOLT:DC" 15.003 IEEE [@34401]VOLT:DC:RANGE:AUTO ON[GTL] 15.004 DISP Allow sufficient time for the 33401A reading to 15.004 DISP stabilize before advancing. 15.005 IEEE [@34401]READ?[D2000][I] # 15.006 ACC 100 3.5000mV .005% .0035/ 15.006 MEM* 1000 15.007 MATH MEM1 = M[1] 15.008 MEME 15.009 MEMC mV 41.3000% 1MH #! Test Tol 1.4455, Sys Tol 0.00037149, TUR 3891.087 (>= 4.00). 16.001 DISP Set the UUT front panel controls as follows: 16.001 DISP FREQUENCY (Hz) switch ............................ X 10M 16.002 IEEE [@33401]FUNC "VOLT:DC" 16.003 IEEE [@34401]VOLT:DC:RANGE:AUTO ON[GTL] 16.004 DISP Allow sufficient time for the 33401A reading to 16.004 DISP stabilize before advancing. 16.005 IEEE [@34401]READ?[D2000][I] # 16.006 ACC 100 3.5000mV .005% .0035/ 16.006 MEM* 1000 16.007 MATH MEM1 = M[1] 16.008 MEME 16.009 MEMC mV 41.3000% 10MH #! Test Tol 1.4455, Sys Tol 0.00037149, TUR 3891.087 (>= 4.00). #17.001 DISP Set the UUT front panel controls as follows: #17.001 DISP FREQUENCY dial ....................................... 5 #17.002 DISP Allow sufficient time for the 33401A reading to #17.002 DISP stabilize before advancing. #17.003 IEEE [@34401]READ?[D2000][I] #17.004 MEM* 1000 #17.005 MATH MEM1 = M[1] #17.006 MEME #17.007 MEMC mV 41.3000% 50MH #18.001 DISP Set the UUT front panel controls as follows: #18.001 DISP OUTPUT ATTEN ......................................... 0 17.001 DISP Slowly decrease the UUT output level using the OUTPUT 17.001 DISP VERNIER control (fully CCW) and carefully disconnect 17.001 DISP the A55 from the output. 17.002 END